1. Field
Embodiments discussed herein relate to data receiving systems.
2. Description of Related Art
The operating frequencies of circuits increases as the sizes of complementary metal oxide semiconductor (CMOS) integrated circuit processes are decreased to increase the speeds thereof. Flip-flop circuits used in high-speed interfaces operate in response to high-speed clocks of several tens of gigahertz. A certain setup time and a hold time may be set in order for the flip-flops to accurately sample data.
For example, FIG. 1 illustrates a parallel-serial conversion circuit disclosed in “Behzad Razavia, 2003 ‘Design of Integrated Circuits for Optical Communications’, International Edition 2003, (Singapore), McGraw-Hill Education, p. 333-339”. The parallel-serial conversion circuit illustrated in FIG. 1 includes multiple flip-flops 10-1 to 10-5, a selection circuit 11, a flip-flop 12, a frequency divider circuit 13, and a buffer 14. The parallel-serial conversion circuit converts two-bit data “id0” and “id1,” supplied through input terminals, into one-bit data “odata” having a data rate two times higher than those of the two-bit data id0 and id1.
FIG. 2 illustrates an exemplary timing chart of the parallel-serial conversion circuit in FIG. 1.